Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG. 1. The device generally includes a semiconductor substrate 101 on which a gate electrode 103 is disposed. The gate electrode 103 acts as a conductor. An input signal is typically applied to the gate electrode 103 via a gate terminal (not shown). Heavily-doped source/drain regions 105 are formed in the semiconductor substrate 101 adjacent to the gate electrode 103 and are connected to source/drain terminals (not shown). As illustrated in FIG. 1, the typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain depends on the respective applied voltages and the type of device being made (e.g., PMOS, NMOS, etc.). Thus, as used herein, the term source/drain region refers generally to an active region used for the formation of a source or drain.
A channel region 107 is formed in the semiconductor substrate 101 beneath the gate electrode 103 and separates the source/drain regions 105. The channel is typically lightly doped with a dopant of a type opposite to that of the source/drain regions 105. The gate electrode 103 is generally separated from the semiconductor substrate 101 by an insulating layer 109, typically an oxide layer such as SiO.sub.2. The insulating layer 109 is provided to prevent current from flowing between the gate electrode 103 and the source/drain regions 105 or channel region 107.
Generally, the source/drain region 105 is formed by implanting dopant into the substrate to form the active regions. The substrate is typically annealed to drive the dopant deeper into the substrate 106 and to provide an approximately uniformly doped source/drain region 105.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode 103, a transverse electric field is set up in the channel region 107. By varying the transverse electric field, it is possible to modulate the conductance of the channel region 107 between the source region and the drain region. In this manner, an electric field controls the current flow through the channel region 107. This type of device is commonly referred to as a MOS field-effect-transistor (MOSFET).
The gate electrode 103 is provided with a specific thickness and is typically uniformly doped throughout that thickness. The source/drain region 105 is typically doped at a desired concentration without particular regard for the thickness of the region 105. The thickness of the source/drain region is generally a function of the dopant concentration and energy levels, as well as the heat processing to which the wafer is subjected after implantation of the dopant.
Increasingly smaller semiconductor devices are being produced often because these devices have improved performance over larger devices and to increase the overall functionality that can be placed on a single chip. One such area of improved performance is the speed of the semiconductor device (e.g., the switching time of a transistor). As devices become smaller, the arrangement, relative orientation, and size of each part of the device (e.g., the gate electrode 103 and the source/drain region 105 of MOS device 100) become more critical and may significantly affect the properties of the device, including diminishing or negating the advantages of using a smaller device. Thus, there is a need for developing methods and techniques for use in the fabrication of smaller, high performance semiconductor devices while reducing negative influences which impact the overall performance of such devices.